NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 12

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NQ5000P S L9TN

Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet

Specifications of NQ5000P S L9TN

Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
12
5-22 SMBus Command Encoding ............................................................................... 367
5-23 Status Field Encoding for SMBus Reads............................................................... 368
5-24 MCH Supported SPD Protocols ........................................................................... 372
5-25 I/O Port Registers in I/O Extender supported by Intel 5000P Chipset MCH ............... 376
5-26 Hot-Plug Signals on a Virtual Pin Port ................................................................. 377
5-27 Intel 5000P Chipset MCH Frequencies for Processors and Core ............................... 378
5-28 Intel 5000P Chipset MCH Frequencies for Memory ................................................ 378
5-29 Intel 5000P Chipset MCH Frequencies for PCI Express........................................... 379
5-30 Clock Pins ....................................................................................................... 379
5-31 Intel 5000P Chipset Error List ............................................................................ 381
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10 SMBus DC Characteristics ................................................................................. 399
6-11 JTAG DC Characteristics.................................................................................... 399
6-12 1.5 V CMOS DC Characteristics .......................................................................... 399
6-13 3.3 V CMOS DC Characteristics .......................................................................... 399
8-1
8-2
8-3
8-4
8-5
10-1 Intel 5000P Chipset MCH Signals By Ball Number ................................................. 426
10-2 Intel 5000V Chipset MCH Signals By Ball Number................................................. 448
10-3 Intel 5000V Chipset MCH Signals By Signal Name ................................................ 467
11-1 Intel 5000Z Chipset MCH Signals By Ball Number................................................. 494
11-2 Intel 5000Z Chipset MCH Signals By Signal Name ................................................ 513
Absolute Maximum Ratings ............................................................................... 393
Operating Condition Power Supply Rails .............................................................. 393
Analog and Bandgap Voltage and Current Specifications........................................ 394
Clock DC Characteristics ................................................................................... 395
FSB Interface DC Characteristics........................................................................ 396
FB-DIMM Transmitter (Tx) Output DC Characteristics............................................ 397
FB-DIMM Receiver (Rx) Output DC Characteristics................................................ 397
PCI Express/ ESI Differential Transmitter (Tx) Output DC Characteristics................. 398
PCI Express/ ESI Differential Receiver (Rx) Input DC Characteristics....................... 398
TAP Signal Definitions ...................................................................................... 405
TAP Reset Actions ............................................................................................ 408
Public TAP Instructions ..................................................................................... 411
Actions of Public TAP Instructions During Various TAP States ................................. 412
Intel® 5000P chipset Device ID Codes................................................................ 413
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet

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