NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 417

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Intel® 5000Z Chipset Differences
9.6
Figure 9-2.
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
System Management Bus Interfaces
The Intel 5000Z Chipset MCH provides four fully functional System Management Bus
(SMBus) Revision 2.0 compliant target interfaces. These interfaces are used to support
platform level operations such as FB-DIMM memory Serial Presence Detect, PCI
Hot-Plug, and configuration of platform devices. Each of these interfaces have
dedicated uses as shown in
Intel 5000Z Chipset MCH SM Bus Interfaces
SM Buses 1 and 2 are dedicated to memory serial presence detect and FBD DIMM
configuration. SM Bus 6 is used to support PCI Express Hot-Plug.
The each SMBus interface consists of two interface pins; one a clock, and the other
serial data. Multiple initiator and target devices may be electrically present on the same
pair of signals. Each target recognizes a start signaling semantic, and recognizes its
own 7-bit address to identify pertinent bus traffic. The MCH address is hard-coded to
01100000b (60h).
The SMBus protocol allows for traffic to stop in “mid sentence,” requiring all targets to
tolerate and properly “clean up” in the event of an access sequence that is abandoned
by the initiator prior to normal completion. The MCH is compliant with this requirement.
PCI Express IBIST Registers
PEX[7:2,0]IBCTL: PEX IBIST Control Register
PEX[7:2,0]IBSYMBUF: PEX IBIST Symbol Buffer
PEX[7:2,0]IBEXTCTL: PEX IBIST Extended Control Register
PEX[7:2,0]IBDLYSYM: PEX IBIST Delay Symbol
PCI Express IBIST Registers
PEX[7:2,0]IBLOOPCNT: PEX IBIST Loop Counter
PEX[7:2,0]IBLNS[3:0]: PEX IBIST Lane Status
Master: PCI-E hot-plug VPI
Master: SPD
Slave: SM Bus
Register Name
Register Name
Figure
9-2.
SM Bus 6
SM Bus 2
SM Bus 1
SM Bus 0
JTAG
Intel® 5000Z
Chipset
4, 5
4, 5
Device
4, 5
4, 5
4, 5
4, 5
Device
0
0
Function
0
0
0
0
Function
38Eh
393h-390h
Offset
380h
384h
388h
38Ch
Offset
421