NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 171

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Register Description
3.8.12.18
3.8.12.19
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Intel 5000P Chipset MCH SPCAPID[7:2, 0] - MCH Specific Capability ID
This register identifies the capability structure and points to the next structure.
PEX_ERR_DOCMD[7:2, 0] - PCI Express Error Do Command Register
Link Error Commands for doing the various signaling: ERR[2:0] and MCERR.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
31:16
31:20
19:16
15:0
15:0
Bit
Bit
ROST
ROST
Attr
Attr
RO
RO
RO
0, 2-3
0
134h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
4-5
0
134h
Intel 5000Z Chipset
4-7
0
134h
Intel 5000P Chipset
0, 2-3
0
140h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
4-5
0
140h
Intel 5000Z Chipset
4-7
0
140h
Intel 5000P Chipset
Default
Default
0h
0h
0h
0h
0h
NXTCAPOFF: Next Capability Offset
This field points to the next Capability in extended configuration space. It is
set 000h since this is the final structure in the chain.
VN: Version Number
Version number for this capability structure.
EXTCAPID: Extended CAP_ID
ERR_FAT_NOFAT_SID: Fatal No Fatal Error Source ID Requestor ID of
the source when an Fatal or No Fatal error is received and the
ERR_FAT_NOFAT_RCVD bit is not already set. i.e log ID of the first Fatal or
Non Fatal error
ERR_CORR_SID: Correctable Error Source ID
Requestor ID of the source when a correctable error is received and the
ERR_CORR_RCVD is not already set. i.e log ID of the first correctable error.
Description
Description
171