NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 395

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Electrical Characteristics
5.
6.
6.2.5
Table 6-10. SMBus DC Characteristics
Notes:
1.
Table 6-11. JTAG DC Characteristics
Table 6-12. 1.5 V CMOS DC Characteristics
Table 6-13. 3.3 V CMOS DC Characteristics (Sheet 1 of 2)
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
V
V
V
I
I
C
V
V
V
I
V
V
V
V
I
V
V
V
V
OL
Leak
Leak
Leak
ABS
IH
IL
OL
Pad
IH
IL
OL
IH
IL
OH
OL
IH
IL
OH
Symbol
Symbol
Symbol
Symbol
there is a 5 ms transition time before Receiver termination values must be met on all un-configured Lanes of a Port.
The RX DC Common Mode Impedance that exists when no power is present or Fundamental Reset is asserted. This helps
ensure that the Receiver Detect circuit will not falsely assume a Receiver is powered on when it is not. This term must be
measured at 300 mV above the RX ground.
At Vol max, Iol = max.
Impedance during all LTSSM states. When transitioning from a Fundamental Reset to Detect (the initial state of the LTSSM)
Miscellaneous DC Characteristics
(d) (cc)
(d) (cc)
(d) (cc)
Signal
Group
Signal
Group
Signal
Group
Signal
Group
(y) (z)
(dd)
(dd)
(ee)
(cc)
(cc)
(cc)
(w)
(w)
(w)
(w)
(w)
(w)
(y)
(y)
(z)
Input High Voltage
Input Low Voltage
Output Low Voltage
Output Low Current
Leakage Current
Pad Capacitance
Input High Voltage
Input Low Voltage
Output Low Voltage
Leakage Current
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Leakage Current
Input Damage Thresholds
Input High Voltage
Input Low Voltage
Output High Voltage
Parameter
Parameter
Parameter
Parameter
-0.2
-0.2
Min
Min
Min
Min
2.1
0.9
1.0
1.1
2.1
Nom
Nom
Nom
Nom
Max
Max
Max
Max
0.8
0.4
0.5
0.4
2.9
1.6
0.5
0.4
1.6
0.8
10
10
70
4
Unit
Unit
Unit
Unit
mA
μA
pF
μA
μA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Note
Note
Note
Note
s
1
s
s
s
399