NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 219

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Register Description
3.9.22.15
3.9.22.16
3.9.22.17
3.9.22.18
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
NRECFBDC - Non-Recoverable FB-DIMM Error Log Register C
This register latches information on the first detected fatal northbound CRC error.
NRECFBDD - Non-Recoverable FB-DIMM Error Log Register D
This register latches information on the first detected fatal northbound CRC error.
NRECFBDE - Non-Recoverable FB-DIMM Error Log Register E
This register latches information on the first detected fatal northbound CRC error.
REDMEMB: Recoverable Memory Data Error Log Register B
This register latches information on the first detected correctable ECC error.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
31:28
31:18
31:0
31:0
27:0
17:0
Bit
Bit
Bit
Bit
ROST
ROST
ROST
ROST
Attr
Attr
Attr
Attr
RV
RV
16
1
D0h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
1
D4h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
1
D8h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
1
7Ch
Default
Default
Default
Default
0h
0h
0h
0h
0h
0
BITS: Bits [95:64] of the packet
BITS: Bits [127:96] of the packet
Reserved
BITS: Bits [155:128] of the packet
errors according to
Reserved
ECC _Locator: identifies the adjacent symbol pair in error for correctable
Table
3-49,
Figure 5-1
Description
Description
Description
Description
and
Figure
5-3.
219