NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 218
NQ5000P S L9TN
Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet
1.NQ5000P_S_L9TN.pdf
(530 pages)
Specifications of NQ5000P S L9TN
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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3.9.22.13
Table 3-48. NRECFBD Mapping Information
3.9.22.14
218
NRECFBDA: Non-Recoverable FB-DIMM Error Log Register A
The NRECFBD registers defined below (A through E) have the following mapping:
This register latches information on the first detected fatal northbound CRC error.
NRECFBDB - Non-Recoverable FB-DIMM Error Log Register B
This register latches information on the first detected fatal northbound CRC error.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
31:0
31:0
Bit
Bit
ROST
ROST
Attr
Attr
155:144
143:128
127:0
16
1
C8h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
1
CCh
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Bits
Default
Default
0h
0h
BITS: Bits [31:0] of the packet
BITS: Bits [63:32] of the packet
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Description
DATA
CRC
ECC
Description
Description
Register Description
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