NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 319

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Functional Description
Figure 5-10. Thermal Throttling with THRMHUNT=1
Figure 5-11. Thermal Throttling with THRMHUNT=0
5.2.12.6
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Closed Loop Activation Throttling Policy
Individual DIMMs flag their thermal state in the FB-DIMM status return. When the
MC.THRMHUNT configuration bit is set, memory reads and writes (summed together)
will be regulated on a per-DIMM-pair basis according to the following algorithm
described in
of thermal throttling if there is a sudden temperature spike between from T
by setting the THRMTHRT register to THRTMID as a starting point when
MC.THRMODE=0. Once this point is reached, if temperature increased further during
the next global window, then THRMTHRT register will be adjusted by the equation
THRMTHRT= MAX(THRMTHRT -2, THRTHI). See staircase effect in
temperature decreased but is still greater than T
THRMTHRT
THRMTHRT
THRTLOW
THRTMID
THRTHI
THRTLOW
THRTMID
THRTHI
THRMHUNT = 0
THRMHUNT = 1
Figure
5-12. Note that Intel 5000P Chipset MCH provides a greater degree
GBLTHRT=0
GBLTHRT=1
GBLTHRT=0
GBLTHRT=1
Tlow
Tlow
Temp. decreasing
mid
, then the THRMTHRT will retain its
Tmid
Tmid
THRMODE=0
THRMODE=1
Figure
Temperature
Temperature
Temp. increasing
5-10. If
low
to T
mid
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