FW82801EB Intel, FW82801EB Datasheet - Page 137

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

5.10.5
5.11
Intel
®
Table 52. Data Frame Format
82801EB ICH5 / 82801ER ICH5R Datasheet
Data Frame Format
Table 52
ICH5 is ANDed with the PCI input signal. This way, the interrupt can be signaled via both the PCI
interrupt input signal and via the SERIRQ signal (they are shared).
Real Time Clock (D31:F0)
The Real Time Clock (RTC) module provides a battery backed-up date and time keeping device
with two banks of static RAM with 128 bytes each, although the first bank has 114 bytes for
general purpose usage. Three interrupt features are available: time of day alarm with once a second
to once a month range, periodic rates of 122 µs to 500 ms, and end of update cycle notification.
Seconds, minutes, hours, days, day of week, month, and year are counted. Daylight savings
compensation is optional. The hour is represented in twelve or twenty-four hour format, and data
can be represented in BCD or binary format. The design is meant to be functionally compatible
with the Motorola MS146818B. The time keeping comes from a 32.768 kHz oscillating source,
which is divided to achieve an update every second. The lower 14 bytes on the lower RAM block
has very specific functions. The first ten are for time and date information. The next four (0Ah to
0Dh) are registers, which configure and report RTC functions.
Frame #
Data
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
shows the format of the data frames. For the PCI interrupts (A
PCI INTC#
PCI INTD#
PCI INTA#
PCI INTB#
IOCHCK#
Interrupt
IRQ10
IRQ12
IRQ13
IRQ14
IRQ15
IRQ11
IRQ0
IRQ1
SMI#
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
Clocks Past
Start Frame
11
14
17
20
23
26
29
32
35
38
41
44
47
50
53
56
59
62
2
5
8
Same as ISA IOCHCK# going active.
Ignored. IRQ0 can only be generated via the internal 8524
Causes SMI# if low. Will set the SERIRQ_SMI_STS bit.
Ignored. IRQ8# can only be generated internally or on ISA.
Ignored. IRQ13 can only be generated from FERR#
Do not include in BM IDE interrupt logic
Do not include in BM IDE interrupt logic
Drive PIRQA#
Drive PIRQB#
Drive PIRQC#
Drive PIRQD#
Comment
–
Functional Description
D), the output from the
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