FW82801EB Intel, FW82801EB Datasheet - Page 658

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Register Index
658
Table 206. Intel
Packet Error Check
Receive Slave Address
Receive Slave Data
Auxiliary Status
Auxiliary Control
PCM In Buffer Descriptor
list Base Address Register
PCM In Current Index
Value
PCM In Last Valid Index
PCM In Status Register
PCM In Position In Current
Buffer
PCM In Prefetched Index
Value
PCM In Control Register
PCM Out Buffer Descriptor
list Base Address Register
PCM Out Current Index
Value
PCM Out Last Valid Index
PCM Out Status Register
PCM Out Position In
Current Buffer
PCM Out Prefetched Index
Value
PCM Out Control Register
Mic. In Buffer Descriptor list
Base Address Register
Mic. In Current Index Value
Mic. In Last Valid Index
Mic. In Status Register
Mic In Position In Current
Buffer
NAMBAR is set at Section 15.1.11, “NABMBAR—Native Audio Bus Mastering Base Address Register
®
Register Name
ICH5 Variable I/O Registers (Sheet 4 of 6)
AC’97 Audio I/O Registers at NAMBAR + Offset
Offset
0Ah
0Ch
0Dh
0Ah
0Bh
1Ah
1Bh
08h
09h
00h
04h
05h
06h
08h
10h
14h
15h
16h
18h
20h
24h
25h
26h
28h
(Audio—D31:F5)” on page 539
Section 14.2.8, “PEC—Packet Error Check (PEC) Register
(SMBUS—D31:F3)” on page 526
Section 14.2.9, “RCV_SLVA—Receive Slave Address Register
(SMBUS—D31:F3)” on page 527
Section 14.2.10, “SLV_DATA—Receive Slave Data Register
(SMBUS—D31:F3)” on page 527
Section 14.2.11, “AUX_STS—Auxiliary Status Register
(SMBUS—D31:F3)” on page 527
Section 14.2.12, “AUX_CTL—Auxiliary Control Register
(SMBUS—D31:F3)” on page 528
Section 15.2.1, “x_BDBAR—Buffer Descriptor Base Address
Register (Audio—D31:F5)” on page 549
Section 15.2.2, “x_CIV—Current Index Value Register (Audio—
D31:F5)” on page 550
Section 15.2.3, “x_LVI—Last Valid Index Register (Audio—
D31:F5)” on page 550
Section 15.2.4, “x_SR—Status Register (Audio—D31:F5)” on
page 551
Section 15.2.5, “x_PICB—Position In Current Buffer Register
(Audio—D31:F5)” on page 552
Section 15.2.6, “x_PIV—Prefetched Index Value Register
(Audio—D31:F5)” on page 552
Section 15.2.7, “x_CR—Control Register (Audio—D31:F5)” on
page 553
Section 15.2.1, “x_BDBAR—Buffer Descriptor Base Address
Register (Audio—D31:F5)” on page 549
Section 15.2.2, “x_CIV—Current Index Value Register (Audio—
D31:F5)” on page 550
Section 15.2.3, “x_LVI—Last Valid Index Register (Audio—
D31:F5)” on page 550
Section 15.2.4, “x_SR—Status Register (Audio—D31:F5)” on
page 551
Section 15.2.5, “x_PICB—Position In Current Buffer Register
(Audio—D31:F5)” on page 552
Section 15.2.6, “x_PIV—Prefetched Index Value Register
(Audio—D31:F5)” on page 552
Section 15.2.7, “x_CR—Control Register (Audio—D31:F5)” on
page 553
Section 15.2.1, “x_BDBAR—Buffer Descriptor Base Address
Register (Audio—D31:F5)” on page 549
Section 15.2.2, “x_CIV—Current Index Value Register (Audio—
D31:F5)” on page 550
Section 15.2.3, “x_LVI—Last Valid Index Register (Audio—
D31:F5)” on page 550
Section 15.2.4, “x_SR—Status Register (Audio—D31:F5)” on
page 551
Section 15.2.5, “x_PICB—Position In Current Buffer Register
(Audio—D31:F5)” on page 552
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Datasheet Section and Location