FW82801EB Intel, FW82801EB Datasheet - Page 518

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

SMBus Controller Registers (D31:F3)
14.1.6
14.1.7
14.1.8
14.1.9
518
SCC—Sub Class Code Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
BCC—Base Class Code Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
SMB_BASE—SMBUS Base Address Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
SVID — Subsystem Vendor Identification Register
(SMBUS—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
31:16
15:5
15:0
Bit
4:1
Bit
Bit
7:0
Bit
7:0
0
Reserved — RO
Base Address — R/W. This field provides the 32-byte system I/O base address for the Intel
SMB logic.
Reserved — RO
IO Space Indicator — RO. Hardwired to 1 indicating that the SMB logic is I/O mapped.
Subsystem Vendor ID (SVID) — RO. The SVID register, in combination with the Subsystem ID (SID)
register, enables the operating system (OS) to distinguish subsystems from each other. The value
returned by reads to this register is the same as that which was written by BIOS into the IDE SVID
register.
Sub Class Code (SCC) — RO.
05h = SM Bus serial controller.
Base Class Code (BCC) — RO.
0Ch = Serial controller.
0Ah
05h
0Bh
0Ch
20
00000001h
2Ch
00h
No
–
23h
–
2Dh
Description
Intel
Description
Description
Description
Attributes:
Size:
Attributes:
Size:
Attribute:
Size:
Attribute:
Size:
Power Well:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
8 bits
RO
8 bits
R/W, RO
32-bits
RO
16 bits
Core
®
ICH5