FW82801EB Intel, FW82801EB Datasheet - Page 465

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

12.1.9
12.1.10
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
HEADTYP—Header Type Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
For functions 1, 2, and 3, this register is hardwired to 00h. For function 0, bit 7 is determined by the
values in bits 15, 10, and 9 of the function disable register (D31:F0:F2h).
BASE—Base Address Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
31:16
15:5
Bit
4:1
Bit
6:0
0
7
Reserved
Base Address — R/W. Bits [15:5] correspond to I/O address signals AD [15:5], respectively. This
gives 32 bytes of relocatable I/O space.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate that the base address field in this
register maps to I/O space.
Multi-Function Device — RO.
0 = Single-function device.
1 = Multi-function device.
Since the upper functions in this device can be individually hidden, this bit is based on the function-
disable bits in Device 31, Function 0, Offset F2h as follows:
D29:F7_Disable
Configuration Layout. Hardwired to 00h, which indicates the standard PCI configuration layout.
(bit 15)
0
X
X
X
1
0Eh
FN 0: 80h
FN 1: 00h
FN 2: 00h
FN 3: 00h
20
00000001h
D29:F3_Disable D29:F2_Disable D29:F1_Disable Multi-Function Bit
–
23h
(bit 11)
X
0
X
X
1
(bit 10)
X
X
0
X
1
Description
Description
Attribute:
Size:
Attribute:
Size:
(bit 9)
X
X
X
1
0
UHCI Controllers Registers
RO
8 bits
R/W, RO
32 bits
1
1
1
1
0
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