FW82801EB Intel, FW82801EB Datasheet - Page 318
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FW82801EB
Manufacturer Part Number
FW82801EB
Description
Manufacturer
Intel
Datasheet
1.FW82801EB.pdf
(671 pages)
Specifications of FW82801EB
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LPC Interface Bridge Registers (D31:F0)
9.1.1
9.1.2
318
Table 141. LPC Interface PCI Register Address Map (LPC I/F—D31:F0) (Sheet 2 of 2)
NOTE: Refer to the latest Intel
VID—Vendor Identification Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
DID—Device Identification Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
EC–EDh
A0–CFh
D0–D3h
E8–EBh
EE–EFh
E4–E5h
E6–E7h
15:0
15:0
Offset
Bit
Bit
D4h
D5h
D8h
E0h
E1h
E3h
F0h
F2h
register.
Vendor ID — RO. This is a 16-bit value assigned to Intel. Intel VID = 8086h
Device ID — RO. This is a 16-bit value assigned to the Intel
LPCFDD_DEC
FB_DEC_EN1
FB_DEC_EN2
BACK_CNTL
RTC_CONF
GEN_CNTL
GEN1_DEC
GEN2_DEC
COM_DEC
FUNC_DIS
Mnemonic
GEN_STA
FB_SEL1
FB_SEL2
LPC_EN
00
8086h
No
02
24D0h
No
–
–
01h
03h
®
ICH5 / ICH5R Specification Update for the value of the Revision Identification
Power Management (See
General Control
General Status
Backed Up Control
Real Time Clock Configuration
LPC I/F COM Port Decode Ranges
LPC I/F FDD and LPT Decode Ranges
Flash BIOS Decode Enable 1
LPC I/F Generic 1 Decode Range 1
LPC I/F Enables
Flash BIOS Select 1
LPC I/F Generic 2 Decode Range 2
Flash BIOS Select 2
Flash BIOS Decode Enable 2
Function Disable
Register Name
Intel
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
®
Section
82801EB ICH5 / 82801ER ICH5R Datasheet
9.8.1)
®
ICH5 LPC bridge.
Core
RO
16-bit
Core
RO
16-bit
See register
00000004h
description
00112233h
Default
0000h
0000h
4567h
0Xh
FFh
0Fh
00h
00h
00h
00h
00h
R/W, R/WO
(special),
R/W, RO
R/W, RO
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
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