FW82801EB Intel, FW82801EB Datasheet - Page 582
FW82801EB
Manufacturer Part Number
FW82801EB
Description
Manufacturer
Intel
Datasheet
1.FW82801EB.pdf
(671 pages)
Specifications of FW82801EB
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High-Precision Event Timer Registers
17.3
.
17.4
.
582
GINTR_STA—General Interrupt Status Register
Address Offset:
Default Value:
MAIN_CNT—Main Counter Value Register
Address Offset:
Default Value:
63:3
Bit
63:0
2
1
0
Bit
Reserved. These bits will return 0 when read.
Timer 2 Interrupt Active (T02_INT_STS) — R/W. Same functionality as Timer 0.
Timer 1 Interrupt Active (T01_INT_STS) — R/W. Same functionality as Timer 0.
Timer 0 Interrupt Active (T00_INT_STS) — R/WC. The functionality of this bit depends on whether
the edge or level-triggered mode is used for this timer. (default = 0)
If set to level-triggered mode:
This bit will be set by hardware if the corresponding timer interrupt is active. Once the bit is set, it can
be cleared by software writing a 1 to the same bit position. Writes of 0 to this bit will have no effect.
If set to edge-triggered mode:
This bit should be ignored by software. Software should always write 0 to this bit.
NOTE: Defaults to 0. In edge triggered mode, this bit will always read as 0 and writes will have no
Counter Value (COUNTER_VAL[63:0]) — R/W. Reads return the current value of the counter.
Writes load the new value to the counter.
NOTES:
1. Writes to this register should only be done while the counter is halted.
2. Reads to this register return the current value of the main counter.
3. 32-bit counters will always return 0 for the upper 32-bits of this register.
4. If 32-bit software attempts to read a 64-bit counter, it should first halt the counter. Since this
5. Reads to this register are monotonic. No two consecutive reads return the same value. The
delays the interrupts for all of the timers, this should be done only if the consequences are
understood. It is strongly recommended that 32-bit software only operate the timer in 32-bit
mode.
second of two reads always returns a larger value (unless the timer has rolled over to 0).
effect.
020h
0000h
0F0h
N/A
Description
Intel
Description
Attribute:
Size:
Attribute:
Size:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
R/W, R/WC
64 bits
R/W
64 bits
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