FW82801EB Intel, FW82801EB Datasheet - Page 437

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

11.1.5
11.1.6
11.1.7
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RID—Revision Identification Register
(SATA—D31:F2)
Offset Address:
Default Value:
PI—Programming Interface Register
(SATA–D31:F2)
Address Offset:
Default Value:
SCC—Sub Class Code Register
(SATA–D31:F2)
Address Offset:
Default Value:
Bit
7:0
Bit
6:4
Bit
7:0
7
3
2
1
0
Revision ID (RID) — RO. 8-bit value that indicates the revision number for SATA.
NOTE: Refer to the latest Intel
This read-only bit is a 1 to indicate that the Intel
Reserved. Will always return 0.
SOP_MODE_CAP — RO. Hardwired to 1 to indicate that the secondary controller supports both
legacy and native modes.
SOP_MODE_SEL — R/W. This bit determines the operating mode of the secondary IDE channel.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
POP_MODE_CAP — RO. Hardwired to 1 indicate that the primary controller supports both legacy
and native modes.
POP_MODE_SEL — R/W. This bit determines the operating mode of the primary IDE channel.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
Sub Class Code (SCC) — RO.
01h = IDE device, in the context of a mass storage device. (Intel
04h = Intel
ICH5R only)
Identification register.
®
08h
See bit description
09h
8Ah
0Ah
01h (82801EB ICH5 only)
04h (82801ER ICH5R only)
RAID Technology device, in the context of a mass storage device. (Intel
®
ICH5 / ICH5R Specification Update for the value of the Revision
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
®
ICH5 supports bus master operation
SATA Controller Registers (D31:F2)
R/W, RO
8 bits
RO
8 bits
®
82801EB ICH5 only)
RO
8 bits
®
82801ER
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