FW82801EB Intel, FW82801EB Datasheet - Page 361

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

9.4.10
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
ELCR1—Master Controller Edge/Level Triggered Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
In edge mode, (bit[x] = 0), the interrupt is recognized by a low to high transition. In level mode
(bit[x] = 1), the interrupt is recognized by a high level. The cascade channel, IRQ2, the heart beat
timer (IRQ0), and the keyboard controller (IRQ1), cannot be put into level mode.
Bit
2:0
7
6
5
4
3
IRQ7 ECL — R/W.
0 = Edge
1 = Level
IRQ6 ECL — R/W.
0 = Edge
1 = Level
IRQ5 ECL — R/W.
0 = Edge
1 = Level
IRQ4 ECL — R/W.
0 = Edge
1 = Level
IRQ3 ECL — R/W.
0 = Edge
1 = Level
Reserved. Must be 0.
4D0h
00h
Description
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
R/W
8 bits
361