FW82801EB Intel, FW82801EB Datasheet - Page 153

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Intel
®
Table 64. Causes of Wake Events
Table 65. GPI Wake Events
82801EB ICH5 / 82801ER ICH5R Datasheet
NOTES:
It is important to understand that the various GPIs have different levels of functionality when used
as wake events. The GPIs that reside in the core power well can only generate wake events from an
S1 state. Also, only certain GPIs are “ACPI Compliant,” meaning that their Status and Enable bits
reside in ACPI I/O space.
The latency to exit the various Sleep states varies greatly and is heavily dependent on power supply
design, so much so that the exit latencies due to the ICH5 are insignificant.
RTC Alarm
Power Button
GPI[0:n]
USB
LAN
RI#
AC97
Primary PME#
Secondary PME#
GST Timeout
SMBALERT#
SMBus Slave
Message
SMBus Host Notify
message received
PME_B0 (internal
USB2.0 EHCI
controller)
1. This is a wake event from S5 only if the sleep state was entered by setting the SLP_EN and SLP_TYP bits
2. If in the S5 state due to a powerbutton override, the possible wake events are due to Power Button, Hard
GPI[13:11],
via software.
Reset Without Cycling (See Command Type 3 in
Type 4 in
GPI[7:0]
GPI8
GPI
Cause
Table
121).
Power Well
S1
S1
S1
S1
S1
Resume
Wake From
Core
States Can
–
–
–
–
–
S5 (Note 1) Set RTC_EN bit in PM1_EN register
S5 (Note 1) GPE0_EN register
S5 (Note 1) Set RI_EN bit in GPE0_EN register
S5 (Note 1) Set PME_EN bit in GPE0_EN register.
S5 (Note 1) Set PME_B0_EN bit in GPE0_EN register.
S1
S1
S1
S1
S1
S1
S1
S1
S1M
–
–
–
–
–
–
–
–
Table 65
S5
S5
S5
S5
S5
S5
S5
S5
Wake From
Always enabled as Wake event
Set USB1_EN, USB 2_EN, USB3_EN, and USB4_EN bits in GPE0_EN
register
Will use PME#. Wake enable set with LAN logic.
Set AC97_EN bit in GPE0_EN register
PME_B0_EN bit in GPE0_EN register
Setting the GST Timeout range to a value other than 00h.
Always enabled as Wake event
Wake/SMI# command always enabled as a Wake event.
Note: SMBus Slave Message can wake the system from S1–S5, as well
as from S5 due to Power Button Override.
HOST_NOTIFY_WKEN bit SMBus Slave Command register. Reported
in the SMB_WAK_STS bit in the GPEO_STS register.
summarizes the use of GPIs as wake events.
S1–S5
S1
Table
ACPI Compliant
Notes
121), and Hard Reset System (See Command
How Enabled
Functional Description
153