FW82801EB Intel, FW82801EB Datasheet - Page 552

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

AC ’97 Audio Controller Registers (D31:F5)
15.2.5
15.2.6
552
x_PICB—Position In Current Buffer Register
(Audio—D31:F5)
I/O Address:
Default Value:
Lockable:
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 16-bit
read to offset 08h. Reads across DWord boundaries are not supported.
x_PIV—Prefetched Index Value Register
(Audio—D31:F5)
I/O Address:
Default Value:
Lockable:
Software can read the registers at the offsets 08h, 0Ah, and 0Bh by performing a 32-bit read from
the address offset 08h. Software can also read this register individually by doing a single, 8-bit read
to offset 0Ah. Reads across DWord boundaries are not supported.
15:0
Bit
7:5
4:0
Bit
Hardwired to 0.
Prefetched Index Value [4:0] — RO. These bits represent which buffer descriptor in the list has
been prefetched. The bits in this register are also modulo 32 and roll over after they reach 31.
Position In Current Buffer [15:0] — RO. These bits represent the number of samples left to be
processed in the current buffer. Once again, this means, the number of samples not yet read from
memory (in the case of reads from memory) or not yet written to memory (in the case of writes to
memory), irrespective of the number of samples that have been transmitted/received across
AC-link.
NABMBAR + 08h (PIPICB),
NABMBAR + 18h (POPICB),
NABMBAR + 28h (MCPICB)
MBBAR + 48h (MC2PICB)
MBBAR + 58h (PI2PICB)
MBBAR + 68h (SPPICB)
0000h
No
NABMBAR + 0Ah (PIPIV),
NABMBAR + 1Ah (POPIV),
NABMBAR + 2Ah (MCPIV)
MBBAR + 4Ah (MC2PIV)
MBBAR + 5Ah (PI2PIV)
MBBAR + 6Ah (SPPIV)
00h
No
Description
Intel
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
16 bits
Core
RO
8 bits
Core