FW82801EB Intel, FW82801EB Datasheet - Page 170

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
5.15
5.15.1
170
Table 74. GPIO Implementation (Sheet 1 of 4)
General Purpose I/O
GPIO Mapping
GPIO[10:9]
GPI[5:2]
GPI11
GPIO
GPI0
GPI1
GPI6
GPI7
GPI8
Type
Input
Input
Input
Input
Input
Input
Input
Input
Only
Only
Only
Only
Only
Only
Only
Only
SMBALERT#
PIRQ[E:H]#
REQB# or
Alternate
Function
Unmuxed
Unmuxed
OC[4:5]#
(Note 1)
REQA#
REQ5#
N/A
Resume
Resume
Resume
Power
Core
Core
Core
Core
Core
Well
Tolerant
Intel
5.0 V
5.0 V
5.0 V
5.0 V
5.0 V
3.3 V
3.3 V
3.3 V
®
82801EB ICH5 / 82801ER ICH5R Datasheet
• GPIO_USE_SEL bit 0 enables REQ/
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• GPIO_USE_SEL bit 1 enables REQ/
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• GPIO_USE_SEL bits [2:5] enable
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• GPIO_USE_SEL bits [9:10] enable
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
• GPIO_USE_SEL bit 11 enables
• Input active status read from GPE0_STS
• Input active high/low set through GPI_INV
GNTA# pair.
register bit 0.
register bit 0.
GNTB# pair (See note 4).
register bit 1.
register bit 1.
PIRQ[E:H]#.
reg. bits [2:5].
reg. bit [2:5].
register bit 6.
register bit 6.
register bit 7.
register bit 7
register bit 8.
register bit 8.
OC[4:5]#.
register bits [9:10].
register bits [9:10].
SMBALERT#
register bit 11.
register bit 11.
Notes