R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 150

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 113 of 802
8.2.3
Notes:
1. When the MCU exits wait mode by a peripheral function interrupt, the CM30 bit is set to 0 (other than wait mode).
2. Set the CM35 bit to 0 in stop mode. When the MCU enters wait mode, if the CM35 bit is set to 1 (no division), the
3. When bits CM37 to CM36 are set to 11b (XIN clock selected), the following will be set when the MCU exits wait
CM30 bit (Wait Control Bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0009h
CM06 bit in the CM0 register is set to 0 (bits CM16 and CM17 enabled) and bits CM17 and CM16 in the CM1
register is set to 00b (no division mode).
mode or stop mode.
• OM05 bit in OM0 register = 1 (XIN clock oscillates)
• OM13 bit in OM1 register = 1 (XIN-XOUT pin)
• OCD2 bit in OCD register = 0 (XIN clock selected)
When the MCU enters wait mode while the CM05 bit in the CM0 register is 1 (XIN clock stops), if the XIN clock is
selected as the CPU clock when exiting wait mode, set the CM06 bit to 1 (divide-by-8 mode) and the CM35 bit to
0.
However, if an externally generated clock is used as the XIN clock, do not set bits CM37 to CM36 to 11b (XIN
clock selected).
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM3 register.
When the CM30 bit is set to 1 (MCU enters wait mode), the CPU clock stops (wait mode). Since the XIN clock,
XCIN clock, and the on-chip oscillator clock do not stop, the peripheral functions using these clocks continue
operating. To set the CM30 bit to 1, set the I flag to 0 (maskable interrupt disabled).
The MCU exits wait mode by a reset or peripheral function interrupt. When the MCU exits wait mode by a
peripheral function interrupt, it resumes executing the instruction immediately after the instruction to set the
CM30 bit to 1.
When the MCU enters wait mode with the WAIT instruction, make sure to set the I flag to 1 (maskable interrupt
enabled). With this setting, interrupt handling is performed by the CPU when the MCU exits wait mode.
Symbol
Symbol
Bit
CM30
CM35
CM36
CM37
System Clock Control Register 3 (CM3)
—
—
—
—
CM37
b7
0
Wait control bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bits
CPU clock division ratio select bit
when exiting wait mode
System clock select bit when exiting
wait or stop mode
CM36
b6
0
Oct 30, 2009
Bit Name
(1)
CM35
b5
0
(2)
b4
—
0
0: Other than wait mode
1: MCU enters wait mode
0: Following settings are enabled:
1: No division
Set to 0.
b7 b6
0 0: MCU exits with the CPU clock used
0 1: Do not set.
1 0: Do not set.
1 1: XIN clock selected
CM06 bit in CM0 register
Bits CM16 and CM17 in CM1 register
b3
—
0
immediately before entering wait or stop mode
b2
—
0
Function
(3)
b1
—
0
8. Clock Generation Circuit
CM30
b0
0
R/W
R/W
R/W
R/W
R/W
R/W
—