R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 324

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 287 of 802
19.5.3
Notes:
1. When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in
2. When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0125h
theTRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register.
theTRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register.
Symbol
Symbol
Bit
IOC0
IOC1
IOC2
IOC3
IOD0
IOD1
IOD2
IOD3
Timer RC I/O Control Register 1 (TRCIOR1) in Timer Mode (Output
Compare Function)
IOD3
b7
1
TRCGRC control bit
TRCGRC mode select bit
TRCGRC register function
select bit
TRCGRD control bit
TRCGRD mode select bit
TRCGRD register function
select bit
IOD2
b6
0
Oct 30, 2009
Bit Name
IOD1
b5
0
(1)
(2)
IOD0
b4
0
b1 b0
Set to 0 (output compare) for the output compare
function.
0: TRCIOA output register
1: General register or buffer register
b5 b4
Set to 0 (output compare) for the output compare
function.
0: TRCIOB output register
1: General register or buffer register
0 0: Pin output by compare match is disabled
0 1: Low-level output at compare match with
1 0: High-level output at compare match with
1 1: Toggle output at compare match with
0 0: Pin output by compare match is disabled
0 1: Low-level output at compare match with
1 0: High-level output at compare match with
1 1: Toggle output at compare match with
IOC3
the TRCGRC register
the TRCGRC register
the TRCGRC register
the TRCGRD register
the TRCGRD register
the TRCGRD register
b3
1
IOC2
b2
0
Function
IOC1
b1
0
IOC0
b0
0
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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