R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 502

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 465 of 802
Figure 22.9
Figure 22.10
22.5.2
22.5.3
Figure 22.9 shows an Operating Example of Waveform Output by Compare Match.
A compare match signal is generated at the last state when the TRG register and the TRGGRA or TRGGRB
register match (according to the timing for updating the count value that the TRG register matches). When a
compare match signal is generated, the output value set by the TRGIOR register is output to the output-compare
output pin (TRGIOA or TRGIOB). After the TRG register and the TRGGRA or TRGGRB register match, no
compare match signal is generated until the TRG input clock is generated.
Figure 22.10 shows the Output-Compare Output Timing.
Select waveform output mode
Compare match A signal
Compare match B signal
Count operation starts
Set the output timing
Procedure Example for Setting Waveform Output by Compare Match
Output-Compare Output Timing
Output selection
Waveform output
TRGGRA register
TRGGRB register
Operating Example of Waveform Output by Compare Match
Output-Compare Output Timing
TRG input clock
(internal signal)
(internal signal)
TRGIOA output
TRGIOB output
TRG register
f1
Oct 30, 2009
(1)
(2)
(3)
(1) Use the TRGIOR register to select the compare match output from
(2) Set the timing for generating a compare match in registers TRGGRA and
(3) Set the TSTART bit in the TRGMR register to 1 to start the count operation
the following three: low-level output, high-level output, or toggle output.
When waveform output mode is selected, the ports function as the compare
match output pins (TRGIOA and TRGIOB).
The output levels of these pins depend on the settings of bits IOA0 and IOA1
and bits IOB0 and IOB1 in the TRGIOR register until the first compare match
occurs.
TRGGRB.
of the TRG register.
N
N+1
N
N+1
N+2
22. Timer RG