R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 515

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 478 of 802
Figure 23.2
RXDi
Table 23.1
TXD0
RXD0
CLK0
TXD1
RXD1
CLK1
Pin Name
SP
SP
Block Diagram of UARTi (i = 0 or 1) Transmit/Receive Unit
2SP
Pin Configuration of UARTi (i = 0 or 1)
1SP
SP
P13_1
P13_2 or P11_4
P13_3
P4_0
P4_1
P4_2
2SP
1SP
SP
Assigned Pin
PAR
PAR
0
Oct 30, 2009
PAR enabled
PRYE = 1
PRYE = 1
PAR enabled
0
PAR
disabled
PRYE = 0
PRYE = 0
PAR
disabled
0
0
Clock
synchronous
type
Clock
synchronous
type
0
UART
UART
0
0
Output
Output
UART (9 bits)
Input
Input
0
UART (9 bits)
I/O
I/O
I/O
Clock
synchronous
type
UART (7 bits)
UART (8 bits)
UART (7 bits)
UART (8 bits)
Clock
synchronous
type
D8
D8
Data bus low-order bits
Data bus high-order bits
UART (8 bits)
UART (9 bits)
Clock
synchronous
type
UART (8 bits)
UART (9 bits)
Clock
synchronous
type
Serial data output
Serial data input
Transfer clock I/O
Serial data output
Serial data input
Transfer clock I/O
UART (7 bits)
UART (7 bits)
D7
D7
23. Serial Interface (UARTi (i = 0 or 1))
D6
D6
MSB/LSB conversion circuit
MSB/LSB conversion circuit
D5
D5
i = 0 or 1
SP: Stop bit
PAR: Parity bit
UARTi transmit register
D4
D4
UARTi receive register
Function
D3
D3
D2
D2
D1
D1
D0
D0
UiRB register
UiTB register
TXDi