R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 239

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 202 of 802
15.2.7
i = 0 to 6
Table 15.2
After Reset
DTCEN0
DTCEN1
DTCEN2
DTCEN3
DTCEN4
DTCEN5
DTCEN6
Register
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0088h (DTCEN0), 0089h (DTCEN1), 008Ah (DTCEN2), 008Bh (DTCEN3), 008Ch (DTCEN4),
The DTCENi registers enable/disable DTC activation by interrupt sources. Table 15.2 shows Correspondences
between Bits DTCENi0 to DTCENi7 (i = 0 to 6) and Interrupt Sources.
Symbol DTCENi7 DTCENi6 DTCENi5 DTCENi4 DTCENi3 DTCENi2 DTCENi1 DTCENi0
DTCENi0 DTC activation enable bit
DTCENi1
DTCENi2
DTCENi3
DTCENi4
DTCENi5
DTCENi6
DTCENi7
Symbol
Bit
DTC Activation Enable Register i (DTCENi) (i = 0 to 6)
SSU/I
receive data
008Dh (DTCEN5), 008Eh (DTCEN6)
Timer RD1
DTCENi7
Timer RC
compare-
compare-
Timer RG
compare-
Key input
match C
match C
match B
capture/
capture/
capture/
Sources
Correspondences between Bits DTCENi0 to DTCENi7 (i = 0 to 6) and Interrupt
input-
input-
input-
INT0
b7
full
Bit
—
0
2
C bus
SSU/I
conversion
data empty
Timer RD1
Timer RC
DTCENi6
compare-
compare-
Timer RA
match D
match D
b6
transmit
capture/
capture/
0
input-
input-
INT1
A/D
Oct 30, 2009
Bit
—
2
C bus
Bit Name
b5
0
Timer RD0
DTCENi5
reception
compare-
Timer RE
capture/
match A
UART0
input-
INT2
Bit
—
—
—
b4
0
transmission
Timer RD0
DTCENi4
compare-
Timer RB
capture/
match B
UART0
input-
INT3
0: Activation disabled
1: Activation enabled
Bit
—
—
—
b3
0
Flash ready
Timer RD0
DTCENi3
compare-
reception
capture/
match C
UART1
status
input-
INT4
Bit
—
—
—
b2
0
Function
transmission
Timer RD0
DTCENi2
compare-
match D
capture/
UART1
input-
b1
INT5
0
Bit
—
—
—
—
b0
Timer RD1
Timer RC
0
DTCENi1
reception
compare-
compare-
match A
match A
capture/
capture/
UART2
input-
input-
INT6
Bit
—
—
—
transmission
Timer RD1
Timer RG
DTCENi0
Timer RC
compare-
compare-
compare-
capture/
match B
capture/
match B
capture/
match A
UART2
input-
input-
input-
INT7
Bit
—
—
15. DTC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W