R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 405

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 368 of 802
Figure 20.16
TRDGRBi register
TRDGRBi register
TRDSTR register
TRDSTR register
TRDSRi register
TRDSRi register
TRDSRi register
TRDSRi register
TRDIOBi output
TRDIOBi output
TSTARTi bit in
TSTARTi bit in
Operating Example in PWM Mode (Duty 0%, Duty 100%)
IMFA bit in
IMFB bit in
IMFA bit in
IMFB bit in
TRDi register value
TRDi register value
0000h
0000h
i = 0 or 1
The above applies under the following conditions:
The EBi bit in the TRDOER1 register is set to 0 (TRDIOBi pin output enabled).
The POLB bit in the TRDPOCRi register is set to 0 (active level is low).
1
0
1
0
1
0
1
0
1
0
1
0
m
m
p
q
n
p
n
Oct 30, 2009
n
n
Rewrite by a program.
Set to 0 by a program.
m
Set to 0 by a program.
Rewrite by a program.
When compare matches with registers TRDGRAi and TRDGRBi are generated
simultaneously, compare match with TRDGRBi register has priority.
“L” is applied to TRDIOBi output (no change).
Duty 100%
p (p>m)
Duty 0%
“L” is applied to TRDIOBi output at compare match
with TRDGRBi register (no change).
p
m: Value set in TRDGRAi register
Since no compare match with TRDGRBi register is
generated, “L” is not applied to TRDIOBi output.
Set to 0 by a program.
Set to 0 by a program.
q
20. Timer RD

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