R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 537

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 500 of 802
Figure 24.2
Table 24.1
TXD2
RXD2
CLK2
CTS2
RTS2
SCL2
SDA2
Pin Name
RXD2
SP: Stop bit
PAR: Parity bit
SMD0 to SMD2, STPS, PRYE, IOPOL, CKDIR: Bits in U2MR register
CLK0, CLK1, CKPOL, CRD, CRS: Bits in U2C0 register
U2ERE: Bit in U2C1 register
SP
SP
SP
P11_1, P11_2
P11_1, P11_2
P11_0
P11_3
P11_3
P11_1, P11_2
P11_1, P11_2
inversion circuit
1SP
STPS = 0
STPS = 1
2SP
STPS = 0
STPS = 1
1SP
2SP
RXD data
UART 2 Pin Configuration
Block Diagram of UART2 Transmit/Receive Unit
0
SP
PAR
0
IOPOL = 0
IOPOL = 1
PAR
PAR
enabled
PRYE = 1
PRYE = 0
PAR
disabled
0
Assigned Pin
Oct 30, 2009
Not inverted
Inverted
PAR
disabled
PRYE = 0
PRYE = 1
PAR
enabled
SMD = 0
0
SMD = 1
UART
I
Clock
synchronous
type
2
C
UART
I
Clock
synchronous
type
2
C
0
0
UART
(9 bits)
I
2
C
0
UART
(9 bits)
I
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
2
C
D8
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
D8
I
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
2
I
Clock
synchronous
type
2
C
C
Output
Output
UART (7 bits)
Input
Input
UART (7 bits)
Logic inversion circuit + MSB/LSB conversion circuit
Logic inversion circuit + MSB/LSB conversion circuit
UART
(8 bits)
UART
(9 bits)
Data bus high-order bits
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Data bus low-order bits
I/O
I/O
I/O
I/O
U2ERE = 0
U2ERE = 1
Error signal output disabled
Error signal output enabled
Serial data output
Serial data input
Transfer clock I/O
Transmission control input
Reception control input
I
I
2
2
C mode clock I/O
C mode data I/O
Error signal
output
circuit
UART2 receive register
UART2 transmit register
IOPOL = 1
IOPOL = 0
24. Serial Interface (UART2)
Inverted
Function
Not inverted
TXD data
inversion
circuit
U2TB
register
U2RB
register
TXD2

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