R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 608

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 571 of 802
Figure 26.10
26.5.1
Figure 26.10 shows Initialization in 4-Wire Bus Communication Mode. Before the data transit/receive
operation, set the TE bit in the SSER register to 0 (transmission disabled), the RE bit in the SSER register to 0
(reception disabled), and initialize the synchronous serial communication unit.
Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.
Setting the RE bit to 0 does not change the settings of flags RDRF and ORER or the contents of the SSRDR
register.
(1)
(2)
Initialization in 4-Wire Bus Communication Mode
Note:
Initialization in 4-Wire Bus Communication Mode
SSER register
1. Write 0 after reading 1 to set the ORER bit to 0.
SSMR register
SSCRH register
SSMR2 register
SSCRH register
SSSR register
SSMR2 register
SSER register
Oct 30, 2009
Set bits CPHS and CPOS
MLS bits
RE bit
TE bit
Set bits RIE, TEIE, and TIE
Start
Set bits CKS0 to CKS2
Set the RSSTP bit
End
SCKS bit
Set bits SOOS, CSS0 to
CSS1, and BIDE
ORER bit
SSUMS bit
Set the MSS bit
RE bit
TE bit
1 (transmit)
1 (receive)
0
1
0
0
0
(1)
1
26. Synchronous Serial Communication Unit (SSU)
(2) Set the BIDE bit to 1 in bidirectional mode and
(1) The MLS bit is set to 0 for MSB-first transfer.
set the I/O of the SCS pin by bits CSS0 and
CSS1.
The clock polarity and phase are set by bits
CPHS and CPOS.