R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 501

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 464 of 802
22.5.1
Notes:
1. When the IOA2 bit is set to 0 (output compare function), the TRGGRA register functions as a compare match
2. When the IOB2 bit is set to 0 (output compare function), the TRGGRB register functions as a compare match
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0175h
register. After a reset, the TRGIOA pin outputs as follows until the first compare match occurs.
IOA1 to IOA0 = 01b: High-level output
register. After a reset, the TRGIOB pin outputs as follows until the first compare match occurs.
IOB1 to IOB0 = 01b: High-level output
Symbol
Symbol
Bit
BUFB
BUFA
IOA0
IOA1
IOA2
IOB0
IOB1
IOB2
Timer RG I/O Control Register (TRGIOR) in Timer Mode (Output Compare
Function)
BUFB
b7
0
TRGGRA control bit
TRGGRA mode
select bit
TRGGRC register function
select bit
TRGGRB control bit
TRGGRB mode
select bit
TRGGRD register function
select bit
10b: Low-level output
11b: Low-level output
10b: Low-level output
11b: Low-level output
IOB2
Bit Name
b6
(1)
(2)
0
Oct 30, 2009
IOB1
b5
0
b1 b0
Set to 0 (output compare) for the output compare function.
0: Not used as the buffer register of the TRGGRA register
1: Used as the buffer register of the TRGGRA register
b5 b4
Set to 0 (output compare) for the output compare function.
0: Not used as the buffer register of the TRGGRB register
1: Used as the buffer register of the TRGGRB register
IOB0
0 0: Pin output by compare match is disabled
0 1: Low-level output at compare match with TRGGRA
1 0: High-level output at compare match with TRGGRA
1 1: Toggle output at compare match with TRGGRA
0 0: Pin output by compare match is disabled (TRGIOB pin
0 1: Low-level output at compare match with TRGGRB
1 0: High-level output at compare match with TRGGRB
1 1: Toggle output at compare match with TRGGRB
b4
0
(TRGIOA pin functions as a programmable I/O port)
functions as a programmable I/O port)
BUFA
b3
0
IOA2
b2
0
Function
IOA1
b1
0
IOA0
b0
0
22. Timer RG
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W