R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 165

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 128 of 802
9.2.4
Notes:
1. Set bits OCD1 to OCD0 to 00b before the MCU enters stop mode or low-speed on-chip oscillator mode (XIN
2. When the OCD2 bit is set to 1 (on-chip oscillator clock selected), the CM14 bit is set to 0 (low-speed on-chip
3. The OCD2 bit is automatically set to 1 (on-chip oscillator clock selected) when the XIN clock oscillation stop is
4. The OCD3 bit is enabled when the OCD0 bit is set to 1 (oscillation stop detection function enabled).
5. The OCD3 bit remains 0 (XIN clock oscillates) when bits OCD1 to OCD0 are set to 00b.
6. Refer to 9.7.1 How to Use Oscillation Stop Detection Function for the switching procedure when the XIN
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 000Ch
clock stops).
oscillator on).
detected while bits OCD1 to OCD0 are set to 11b. When the OCD3 bit is set to 1 (XIN clock stops), the OCD2 bit
remains unchanged even if 0 (XIN clock selected) is written to it.
clock re-oscillates after detecting an oscillation stop.
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the OCD register.
Symbol
Symbol
OCD0 Oscillation stop detection enable bit
OCD1 Oscillation stop detection interrupt
OCD2 On-chip oscillator clock select bit
OCD3 Clock monitor bit
Bit
Oscillation Stop Detection Register (OCD)
—
—
—
—
b7
—
0
enable bit
Reserved bits
b6
—
0
Oct 30, 2009
Bit Name
(4, 5)
b5
—
0
b4
—
0
(3)
(6)
0: Oscillation stop detection function disabled
1: Oscillation stop detection function enabled
0: Disabled
1: Enabled
0: XIN clock selected
1: On-chip oscillator clock selected
0: XIN clock oscillates
1: XIN clock stops
Set to 0.
OCD3
b3
0
OCD2
(1)
b2
1
Function
OCD1
(6)
b1
0
OCD0
b0
0
(2)
9. Power Control
(1)
R/W
R/W
R/W
R/W
R/W
R