R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 475

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 438 of 802
21.3.3
21.3.4
Note:
1. Do not set multiple enable bits to 1 (interrupt enabled).
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 011Ch
Address 011Dh
Symbol TSTART H12_H24
Symbol
SEIE025 Periodic interrupt triggered every
H12_H24 Operating mode select bit
TRERST Timer RE reset bit
TSTART Timer RE count start bit
Symbol
SEIE05 Periodic interrupt triggered every
COMIE Compare match interrupt
TOENA
Symbol
TCSTF
Bit
Bit
WKIE
MNIE
SEIE
HRIE
DYIE
Timer RE Control Register 1 (TRECR1) in Output Compare Mode
Timer RE Control Register 2 (TRECR2) in Output Compare Mode
INT
PM
—
COMIE
b7
b7
X
X
0.25 seconds enable bit
0.5 seconds enable bit
Periodic interrupt triggered every
second enable bit
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
hour enable bit
Periodic interrupt triggered every
day enable bit
Periodic interrupt triggered every
week enable bit
enable bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Timer RE count status flag
TREO pin output enable bit
Interrupt request timing bit
A.m./p.m. bit
WKIE
b6
b6
X
X
Oct 30, 2009
Bit Name
Bit Name
(1)
(1)
(1)
(1)
(1)
DYIE
PM
b5
b5
X
X
(1)
(1)
TRERST
HRIE
b4
b4
X
X
Set to 0 in output compare mode.
0: Compare match interrupt disabled
1: Compare match interrupt enabled
0: Count stopped
1: Counting
0: Clock output disabled
1: Clock output enabled
Set to 0 in output compare mode.
When setting this bit to 0 after setting it to 1,
the following will occur.
• Registers TRESEC, TREMIN, TREHR, TREWK,
• Bits TCSTF, INT, PM, H12_H24, and TSTART in
• The 8-bit counter is set to 00h and the 4-bit
Set to 0 in output compare mode.
Set to 0 in output compare mode.
0: Count stops
1: Count starts
and TRECR2 are set to 00h.
the TRECR1 register are set to 0.
counter is set to 0h.
MNIE
INT
b3
b3
X
X
TOENA
SEIE
b2
b2
X
0
Function
Function
SEIE05
TCSTF
b1
b1
X
X
SEIE025
b0
b0
—
X
X
21. Timer RE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R