R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 97

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 60 of 802
6.2
6.3
6.4
Table 6.3
Note:
Table 6.4
Read
Write
Input
Output
I/O of Peripheral Function
Operation When
The PDi_j (j = 0 to 7) bit in the PDi (i = 0 to 7, 10 to 13) register controls the input/output of ports P0 to P7 and P10
to P13. The Pi register consists of a port latch to retain output data and a circuit to read the pin status.
Figures 6.1 to 6.4 show the I/O Port Configurations, and Table 6.3 lists the I/O Port Functions.
I/O ports function as I/O ports for peripheral functions (refer to Tables 1.16 to 1.18 Pin Name Information by Pin
Number).
Table 6.4 lists the Setting of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions (i = 0 to 7, 10 to 13;
j = 0 to 7). Refer to the description of each function for information on how to set peripheral functions.
Figure 6.5 shows the Pin Configuration.
1. i = 0 to 7, 10 to 13; j = 0 to 7
Pi Register
Accessing
I/O Port Functions
Effect on Peripheral Functions
Pins Other than I/O Ports
I/O Port Functions
(i = 0 to 7, 10 to 13; j = 0 to 7)
Setting of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions
Read the pin input level.
Write to the port latch.
When PDi_j Bit is Set to 0 (Input Mode)
Oct 30, 2009
Set this bit to 0 (input mode).
This bit can be set to either 0 or 1 (output regardless of the port setting).
Value of PDi_j Bit in PDi Register
PDi_j Bit Settings for Shared Pin Function
Read the port latch.
Write to the port latch. The value written to
the port latch is output from the pin.
When PDi_j Bit is Set to 1 (Output Mode)
(1)
6. I/O Ports