R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 19

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.6
20.7
20.5.13 Timer RD Interrupt Enable Register i (TRDIERi) (i = 0 or 1) in PWM Mode ................................ 362
20.5.14 Timer RD PWM Mode Output Level Control Register i (TRDPOCRi) (i = 0 or 1) in PWM Mode . 362
20.5.15 Timer RD Counter i (TRDi) (i = 0 or 1) in PWM Mode .................................................................. 363
20.5.16 Timer RD General Registers Ai, Bi, Ci, and Di (TRDGRAi, TRDGRBi, TRDGRCi, TRDGRDi)
20.5.17 Timer RD Pin Select Register 0 (TRDPSR0) ................................................................................... 365
20.5.18 Timer RD Pin Select Register 1 (TRDPSR1) ................................................................................... 366
20.5.19 Operating Example ........................................................................................................................... 367
20.5.20 A/D Trigger Generation .................................................................................................................... 369
20.6.1
20.6.2
20.6.3
20.6.4
20.6.5
20.6.6
20.6.7
20.6.8
20.6.9
20.6.10 Timer RD Status Register i (TRDSRi) (i = 0 or 1) in Reset Synchronous PWM Mode .................. 378
20.6.11 Timer RD Interrupt Enable Register i (TRDIERi) (i = 0 or 1) in Reset Synchronous PWM Mode 379
20.6.12 Timer RD Counter 0 (TRD0) in Reset Synchronous PWM Mode ................................................... 379
20.6.13 Timer RD General Registers Ai, Bi, Ci, and Di (TRDGRAi, TRDGRBi, TRDGRCi, TRDGRDi)
20.6.14 Timer RD Pin Select Register 0 (TRDPSR0) ................................................................................... 381
20.6.15 Timer RD Pin Select Register 1 (TRDPSR1) ................................................................................... 382
20.6.16 Operating Example ........................................................................................................................... 383
20.6.17 A/D Trigger Generation .................................................................................................................... 384
20.7.1
20.7.2
20.7.3
20.7.4
20.7.5
20.7.6
20.7.7
20.7.8
20.7.9
20.7.10 Timer RD Status Register i (TRDSRi) (i = 0 or 1) in Complementary PWM Mode ....................... 393
20.7.11 Timer RD Interrupt Enable Register i (TRDIERi) (i = 0 or 1) in Complementary PWM Mode ..... 394
20.7.12 Timer RD Counter 0 (TRD0) in Complementary PWM Mode ........................................................ 394
20.7.13 Timer RD Counter 1 (TRD1) in Complementary PWM Mode ........................................................ 395
20.7.14 Timer RD General Registers Ai, Bi, C1, and Di (TRDGRAi, TRDGRBi, TRDGRC1, TRDGRDi)
20.7.15 Timer RD Pin Select Register 0 (TRDPSR0) ................................................................................... 397
20.7.16 Timer RD Pin Select Register 1 (TRDPSR1) ................................................................................... 398
20.7.17 Operating Example ........................................................................................................................... 399
20.7.18 Transfer Timing from Buffer Register .............................................................................................. 401
20.7.19 A/D Trigger Generation .................................................................................................................... 401
Reset Synchronous PWM Mode ........................................................................................................... 370
Complementary PWM Mode ................................................................................................................ 385
(i = 0 or 1) in PWM Mode ................................................................................................................. 364
Module Standby Control Register (MSTCR) ................................................................................... 372
Timer RD Control Expansion Register (TRDECR) ......................................................................... 373
Timer RD Trigger Control Register (TRDADCR) ........................................................................... 373
Timer RD Start Register (TRDSTR) in Reset Synchronous PWM Mode ....................................... 374
Timer RD Mode Register (TRDMR) in Reset Synchronous PWM Mode ....................................... 374
Timer RD Function Control Register (TRDFCR) in Reset Synchronous PWM Mode ................... 375
Timer RD Output Master Enable Register 1 (TRDOER1) in Reset Synchronous PWM Mode ...... 376
Timer RD Output Master Enable Register 2 (TRDOER2) in Reset Synchronous PWM Mode ...... 376
Timer RD Control Register 0 (TRDCR0) in Reset Synchronous PWM Mode ................................ 377
(i = 0 or 1) in Reset Synchronous PWM Mode ................................................................................. 380
Module Standby Control Register (MSTCR) ................................................................................... 387
Timer RD Control Expansion Register (TRDECR) ......................................................................... 387
Timer RD Trigger Control Register (TRDADCR) ........................................................................... 388
Timer RD Start Register (TRDSTR) in Complementary PWM Mode ............................................ 389
Timer RD Mode Register (TRDMR) in Complementary PWM Mode ............................................ 389
Timer RD Function Control Register (TRDFCR) in Complementary PWM Mode ........................ 390
Timer RD Output Master Enable Register 1 (TRDOER1) in Complementary PWM Mode ........... 391
Timer RD Output Master Enable Register 2 (TRDOER2) in Complementary PWM Mode ........... 391
Timer RD Control Register i (TRDCRi) (i = 0 or 1) in Complementary PWM Mode .................... 392
(i = 0 or 1) in Complementary PWM Mode ...................................................................................... 395
A - 10

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