R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 745

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 708 of 802
Figure 33.6
33.4.10 Data Protect Function
(Lock bit disable select bit)
(Ready/busy status flag)
Each block in the flash memory has a nonvolatile lock bit. The lock bit is enabled by setting the FMR13 bit in
the FMR1 register is set to 0 (lock bit enabled). The lock bit can be used to disable (lock) programming or
erasing each block. This prevents data from being written or erased inadvertently. A block status changes
according to the lock bit as follows:
•
•
The lock bit data is set to 0 (locked) by executing the lock bit program command and to 1 (not locked) by
erasing the block. No commands can be used to set only the lock bit data to 1.
The lock bit data can be read using the read lock bit status command.
When the FMR13 bit is set to 1 (lock bit disabled), the lock bit function is disabled and all blocks are not locked
(each lock bit data remains unchanged). The lock bit function is enabled by setting the FMR13 bit to 0 (the lock
bit data is retained).
When the block erase command is executed while the FMR13 bit is set to 1, the target block is erased regardless
of the lock bit status. The lock bit of the erase target block is set to 1 after auto-erasure completes.
Refer to 33.4.11 Software Commands for the details of individual commands.
The FMR13 bit is set to 0 after auto-erasure completes. This bit is also set to 0 if one of the following conditions
is met. To erase or program a different locked block, set the FMR 13 bit to 1 again and execute the block erase
or program command.
•
•
•
•
Figure 33.6 shows the FMR13 Bit Operation Timing.
When the lock bit data is set to 0: locked (the block cannot be programmed or erased)
When the lock bit data is set to 1: not locked (the block can be programmed and erased)
The FST7 bit in the FST register changes from 0 (busy) to 1 (ready).
An incorrect command is input.
The FMR01 bit in the FMR0 register is set to 0 (CPU mode disabled).
The FMSTP bit in the FM0 register is set to 1 (flash memory stops).
FMR13 bit
Operation
FMR13 Bit Operation Timing
FST7 bit
1
0
1
0
Oct 30, 2009
Set to 1 by a program.
Erase start
Erase
Lock bit enabled
Erase completion
0 is set at the rising edge of the FST7 bit.
FST7: Bit in FST register
FMR13: Bit in FMR1 register
33. Flash Memory