R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 310

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 273 of 802
Figure 19.3
19.3.2
Table 19.6
Input capture function
Output compare function Compare match between the TRC
PWM mode
PWM2 mode
The above applies under the following conditions:
• The BFC bit in the TRCMR register is set to 1 (TRCGRC register is used as the buffer register of the TRCGRA register).
• Bits IOA2 to IOA0 in the TRCIOR0 register are set to 100b (input capture at the rising edge).
Bits BFC and BFD in the TRCMR register are used to select the TRCGRC or TRCGRD register as the buffer
register of the TRCGRA or TRCGRB register.
• Buffer register of TRCGRA register: TRCGRC register
• Buffer register of TRCGRB register: TRCGRD register
Buffer operation differs depending on the mode.
Table 19.6 lists the Buffer Operation in Each Mode, Figure 19.3 shows the Buffer Operation of Input Capture
Function, and Figure 19.4 shows the Buffer Operation of Output Compare Function.
Function, Mode
TRCGRC register
TRCGRA register
Buffer Operation
TRCIOA input
TRC register
Buffer Operation in Each Mode
Buffer Operation of Input Capture Function
(input capture signal)
(buffer)
TRCIOA input
TRCGRC
register
Input capture signal input
register and the TRCGRA (TRCGRB)
register
• Compare match between the TRC
• TRCTRG pin trigger input
register and the TRCGRA register
Oct 30, 2009
n-1
Transfer Timing
m
TRCGRA
register
n
Transfer
Transfer
m
n
The content of the TRCGRA
(TRCGRB) register is transferred to
the buffer register.
The content of the buffer register is
transferred to the TRCGRA
(TRCGRB) register.
The content of the buffer register
(TRCGRD) is transferred to the
TRCGRB register.
Transfer Destination Register
n+1
TRC
19. Timer RC

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