R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 542

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 505 of 802
24.2.6
Notes:
1. When bits SMD2 to SMD0 in the U2MR register are set to 000b (serial interface disabled) or the RE bit in the
2. These error flags are disabled when bits SMD2 to SMD0 in the U2MR register are set to 001b (clock
After Reset
After Reset
b10
b11
b12
b13
b14
b15
Bit
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
Address 00AFh to 00AEh
U2C1 register is set to 0 (reception disabled), all of bits SUM, PER, FER, and OER are set to 0 (no error). The
SUM bit is set to 0 (no error) when all of bits PER, FER, and OER are set to 0 (no error). Bits PER and FER are
set to 0 by reading the lower byte of the U2RB register.
synchronous serial I/O mode) or to 010b (I
Symbol
Symbol
Bit
Bit
Symbol
MPRB
UART2 Receive Buffer Register (U2RB)
SUM
OER
FER
PER
SUM
b15
b7
X
X
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Reserved bit
Overrun error flag
Framing error flag
Parity error flag
Error sum flag
PER
b14
b6
X
X
Bit Name
Oct 30, 2009
(1, 2)
(1, 2)
FER
b13
b5
X
X
(1)
(1, 2)
2
C mode). When read, the contents are undefined.
OER
b12
b4
X
X
Receive data (D7 to D0)
Receive data (D8)
[When the multiprocessor communication function is not
used]
Receive data (D8)
[When the multiprocessor communication function is used]
• When the MPRB bit is set to 0, received D0 to D7 are
• When the MPRB bit is set to 1, received D0 to D7 are ID
Set to 0.
0: No overrun error
1: Overrun error
0: No framing error
1: Framing error
0: No parity error
1: Parity error
0: No error
1: Error
data fields.
fields.
b11
b3
X
X
(1)
b10
b2
X
X
Function
b1
b9
X
X
24. Serial Interface (UART2)
MPRB
b0
b8
X
X
R/W
R/W
R
R
R
R
R
R

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