R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 529

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 492 of 802
Table 23.6
i = 0 or 1
Notes:
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
1. The bits used for transmission/receive data are as follows:
2. The contents of the following are undefined:
Register
- Bits b7 and b8 when the transfer data is 7 bits long
- Bit b8 when the transfer data is 8 bits long
- Bits b0 to b6 when transfer data is 7 bits long
- Bits b0 to b7 when transfer data is 8 bits long
- Bits b0 to b8 when transfer data is 9 bits long
Registers Used and Settings in UART Mode
b0 to b8
b0 to b8
OER, FER, PER, SUM Error flag
b0 to b7
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
CLK0, CLK1
TXEPT
NCH
CKPOL
UFORM
TE
TI
RE
RI
UiIRS
UiRRM
Bit
Oct 30, 2009
Set transmit data.
Receive data can be read.
Set the transfer rate.
Set to 100b when transfer data is 7 bits long.
Set to 101b when transfer data is 8 bits long.
Set to 110b when transfer data is 9 bits long.
Select an internal clock or external clock.
Select the stop bit(s).
Select whether parity is included and whether odd or even.
Select the count source for the UiBRG register.
Transmit register empty flag
Select the output format of the TXDi pin.
Set to 0.
Select LSB first or MSB first when transfer data is 8 bits long.
Set to 0 when transfer data is 7 bits or 9 bits long.
Set to 1 to enable transmission.
Transmit buffer empty flag
Set to 1 to enable reception.
Reception complete flag
Select the UARTi transmit interrupt source.
Set to 0.
(1)
(2)
Function
23. Serial Interface (UARTi (i = 0 or 1))

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