R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 610

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 573 of 802
Figure 26.11
TDRE bit in
SSSR register
TEND bit in
SSSR register
TDRE bit in
SSSR register
TEND bit in
SSSR register
Program
processing
Program
processing
• CPHS bit = 0 (data change at odd edges), CPOS bit = 0 (“H” when clock stops), and
• CPHS bit = 1 (data change at even edges). CPOS bit = 0 (“H” when clock stops), and
BS3 to BS0 = 1000b (8 bits)
BS3 to BS0 = 1000b (8 bits)
(output)
(output)
SSCK
SSCK
SSO
Example of Synchronous Serial Communication Unit Operation during Data
Transmission (4-Wire Bus Communication Mode, 8-Bit SSU Data Transfer Length)
SSO
SCS
SCS
1
0
1
0
1
0
1
0
BS0 to BS3: Bits in SSBR register
CPHS, CPOS: Bits in SSMR register
Write data to the SSTDR register.
Write data to the SSTDR register.
TXI interrupt request
generation
TXI interrupt request
generation
b7
Oct 30, 2009
b7
1 frame
b6
1 frame
b6
b0
b0
TXI interrupt request
generation
TXI interrupt request
generation
26. Synchronous Serial Communication Unit (SSU)
b7
1 frame
b7
b6
TEI interrupt request
generation
TEI interrupt request
generation
1 frame
b6
b0
b0
High-impedance
High-impedance