R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 579

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 542 of 802
Figure 24.21
Serial data
MP bit in
U2SMR5 register
MPIE bit in
U2SMR5 register
RI bit in
U2C1 register
U2RB register
MCU operation
User processing
Serial data
MP bit in
U2SMR5 register
MPIE bit in
U2SMR5 register
RI bit in
U2C1 register
U2RB register
MCU operation
User processing
1
1
1
0
1
0
1
0
1
0
(with 8-Bit Data/Multiprocessor Bit/One Stop Bit)
Receive Operation Example during Multiprocessor Communication
Detect the MPRB bit and
set the MPIE bit to 0.
1
Detect the MPRB bit and
set the MPIE bit to 0.
1
Start
bit
0
Start
bit
0
D0
D0
ID1
Oct 30, 2009
D1
D1
data (ID2)
A reception
complete
interrupt request
is generated.
Receive
1 frame
data (ID1)
A reception complete
interrupt request is
generated.
Receive
1 frame
(a) When Data Does Not Match Own Station ID
D7
(b) When Data Matches Own Station ID
D7
MPRB
Read data in
the U2RB register.
Set the RI bit to 0.
1
MPRB
1
Stop
bit
1
Read data in
the U2RB register.
Set the RI bit to 0.
Stop
bit
1
0
0
If data matches own
station ID, continue
reception without any
setting changes.
ID2
D0
ID1
D0
D1
If data does not match
own station ID, set the
MPIE bit to 1 again.
D1
data (DATA2)
Receive
1 frame
data (DATA1)
Receive
1 frame
A reception
complete
interrupt request
is generated.
D7
D7
MPRB: Bit in U2RB register
MPIE: Bit in U2SMR5 register
MPRB
0
MPRB
24. Serial Interface (UART2)
No reception complete
interrupt request is
generated.
The U2RB register retains
its state.
0
Set the RI bit to 0.
Read data in
the U2RB register.
1
1
Marked state
1
(Idle state)
Marked state
1
(Idle state)
DATA2
Set the MPIE bit
to 1 again.