R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 354

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 317 of 802
Table 20.5
i = 0 or 1, j = either A, B, C, or D
Count sources
Count operations
Count period
Count start condition
Count stop condition
Interrupt request generation
timing
TRDIOA0 pin function
TRDIOB0, TRDIOC0,
TRDIOD0, TRDIOA1 to
TRDIOD1 pins function
INT0 pin function
Read from timer
Write to timer
Selectable functions
Item
Input Capture Function Specifications
Oct 30, 2009
f1, f2, f4, f8, f32, fC2, or
external signal input to the TRDCLK pin (active edge selectable by a
program)
Increment
When bits CCLR2 to CCLR0 in the TRDCRi register are set to 000b
(free-running operation).
1/fk × 65,536 fk: Frequency of count source
1 (count starts) is written to the TSTARTi bit in the TRDSTR register.
0 (count stops) is written to the TSTARTi bit in the TRDSTR register
when the CSELi bit in the TRDSTR register is set to 1.
• Input capture (active edge of the TRDIOji input or fOCO128 signal
• TRDi register overflows
Programmable I/O port, input-capture input, or TRDCLK (external clock)
input
Programmable I/O port, or input-capture input
(selectable for each individual pin)
Programmable I/O port or INT0 interrupt input
The count value can be read by reading the TRDi register.
• When the SYNC bit in the TRDMR register is set to 0 (timer RD0 and
• When the SYNC bit in the TRDMR register is set to 1 (timer RD0 and
• Input-capture input pin selection
• Input-capture input active edge selection
• Timing for setting the TRDi register to 0000h
• Buffer operation (Refer to 20.2.2 Buffer Operation. )
• Synchronous operation (Refer to 20.2.3 Synchronous Operation. )
• Digital filter
• Input-capture trigger selection
edge)
timer RD1 operate independently).
Data can be written to the TRDi register.
timer RD1 operate synchronously).
Data can be written to both the TRD0 and TRD1 registers by writing to
the TRDi register.
Either one pin or multiple pins among TRDIOAi, TRDIOBi, TRDIOCi, or
TRDIODi.
The rising edge, falling edge, or both the rising and falling edges
Overflow or input capture
The TRDIOji input is sampled and the level is determined when
the sampled input level match as three times.
fOCO128 can be selected for input-capture trigger input of the
TRDGRA0 register.
Specification
20. Timer RD