R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 192

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 155 of 802
11.2.3
Notes:
1. Only 0 can be written to the IR bit. Do not write 1 to this bit.
2. When the INTiPL bit in the INTEN register is set to 1 (both edges), set the POL bit to 0 (falling edge selected).
3. The IR bit may be set to 1 (interrupt requested) when the POL bit is rewritten. Refer to 11.8.4 Changing
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0043h (INT7IC), 0044h (INT6IC), 0045h (INT5IC), 0046h (INT4IC),
Interrupt Sources .
Rewrite the interrupt control register when an interrupt request corresponding to the register is not generated.
Refer to 11.8.5 Rewriting Interrupt Control Register.
Symbol
Symbol
Bit
ILVL1
ILVL2
ILVL0
POL
INTi Interrupt Control Register (INTiIC) (i = 0 to 7)
IR
0055h (INT2IC), 0059h (INT1IC), 005Ah (INT3IC), 005Dh (INT0IC)
b7
X
Interrupt priority level select bit
Interrupt request bit
Polarity switch bit
Reserved bit
Nothing is assigned. If necessary, set to 0. When read, the content is undefined.
b6
X
Oct 30, 2009
Bit Name
(3)
b5
0
POL
b4
0
b2 b1 b0
0: No interrupt requested
1: Interrupt requested
0: Falling edge selected
1: Rising edge selected
Set to 0.
0 0 0: Level 0 (interrupt disabled)
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
b3
IR
X
ILVL2
b2
0
Function
(2)
ILVL1
b1
0
ILVL0
b0
0
11. Interrupts
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(1)

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