R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 329

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 292 of 802
19.6
Table 19.11
j = B, C, or D
h = A, B, C, or D
Count source
Count operation
PWM waveform
Count start condition
Count stop condition
Interrupt request
generation timing
TRCIOA pin function
TRCIOB, TRCIOC, and
TRCIOD pins function
INT0 pin function
Read from timer
Write to timer
Selectable functions
This mode outputs PWM waveforms. A maximum of three PWM waveforms with the same period are output.
PWM mode or timer mode can be selected for each individual pin. (However, the TRCGRA register cannot be used
for timer mode since the register is used when using any pin for PWM mode.)
Table 19.11 lists the PWM Mode Specifications, Figure 19.13 shows a Block Diagram of PWM Mode, Table 19.12
lists the Functions of TRCGRh Register in PWM Mode, and Figures 19.14 and 19.15 show Operating Examples in
PWM Mode.
PWM Mode
Item
PWM Mode Specifications
Oct 30, 2009
f1, f2, f4, f8, f32, or
external signal (rising edge) input to the TRCCLK pin
Increment
PWM period: 1/fk × (m + 1)
Active level width: 1/fk × (m - n)
Inactive width: 1/fk × (n + 1)
1 (count starts) is written to the TSTART bit in the TRCMR register.
• When the CSEL bit in the TRCCR2 register is set to 0 (count continues
• When the CSEL bit in the TRCCR2 register is set to 1 (count stops at
• Compare match (the contents of the TRC register and the TRCGRj
• TRC register overflow
Programmable I/O port
Programmable I/O port or PWM output
(selectable for each individual pin)
Programmable I/O port, pulse output forced cutoff signal input, or INT0
interrupt input
The count value can be read by reading the TRC register.
The TRC register can be written to.
• One to three pins selectable as PWM pins
• Active level selectable for each individual pin
• Initial level selectable for each individual pin
• Buffer operation (Refer to 19.3.2 Buffer Operation .)
• Pulse output forced cutoff signal input (Refer to 19.3.4 Forced Cutoff
• A/D trigger generation
after compare match with the TRCGRA register).
0 (count stops) is written to the TSTART bit in the TRCMR register.
The PWM output pin retains the output level before the count stops,
The TRC register retains a value before the count stops.
compare match with the TRCGRA register).
The count stops at a compare match with the TRCGRA register. The
PWM output pin retains the level after the output is changed by the
compare match.
register match)
One or more of pins TRCIOB, TRCIOC, and TRCIOD
of Pulse Output .)
fk: Frequency of count source
m: Value set in TRCGRA register
n: Value set in TRCGRj register
n+1
m+1
m-n
Specification
(Active level is low)
19. Timer RC