R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 399

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 362 of 802
20.5.13 Timer RD Interrupt Enable Register i (TRDIERi) (i = 0 or 1) in PWM Mode
20.5.14 Timer RD PWM Mode Output Level Control Register i (TRDPOCRi) (i = 0 or
After Reset
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0144h (TRDIER0), 0154h (TRDIER1)
Address 0145h (TRDPOCR0), 0155h (TRDPOCR1)
Symbol
Symbol
Symbol
Symbol
Bit
IMIEA
IMIEB
IMIEC
IMIED
Bit
POLB
POLC
POLD
OVIE
1) in PWM Mode
—
—
—
—
—
—
—
—
b7
b7
—
—
1
1
Input-capture/compare-match interrupt
enable bit A
Input-capture/compare-match interrupt
enable bit B
Input-capture/compare-match interrupt
enable bit C
Input-capture/compare-match interrupt
enable bit D
Overflow/underflow interrupt enable bit 0: Interrupt (OVI) by OVF bit disabled
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
PWM mode output level control bit B
PWM mode output level control bit C
PWM mode output level control bit D
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
b6
b6
—
—
1
1
Oct 30, 2009
Bit Name
Bit Name
b5
—
b5
—
1
1
OVIE
b4
b4
—
0
1
0: TRDIOBi output level is selected as low active
1: TRDIOBi output level is selected as high active
0: TRDIOCi output level is selected as low active
1: TRDIOCi output level is selected as high active
0: TRDIODi output level is selected as low active
1: TRDIODi output level is selected as high active
IMIED
0: Interrupt (IMIA) by IMFA bit disabled
1: Interrupt (IMIA) by IMFA bit enabled
0: Interrupt (IMIB) by IMFB bit disabled
1: Interrupt (IMIB) by IMFB bit enabled
0: Interrupt (IMIC) by IMFC bit disabled
1: Interrupt (IMIC) by IMFC bit enabled
0: Interrupt (IMID) by IMFD bit disabled
1: Interrupt (IMID) by IMFD bit enabled
1: Interrupt (OVI) by OVF bit enabled
b3
b3
—
0
1
IMIEC
POLD
b2
b2
0
0
Function
Function
IMIEB
POLC
b1
b1
0
0
IMIEA
POLB
b0
b0
0
0
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—