R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 483

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 446 of 802
22.2
22.2.1
MDF Bit (Phase Counting Mode Select Bit)
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0170h
When the MDF bit is set to 0, the counter counts the count source set by bits TCK0 to TCK2 in the TRGCR
register.
When the MDF bit is set to 1, the counter counts the phase of input signals from the TRGCLKj pin (j = A or B)
as listed in Table 22.12 Increment and Decrement Conditions for TRG Register.
Symbol TSTART
Registers
TSTART TRG count start bit
Symbol
DFCK0
DFCK1
Bit
PWM
MDF
DFA
DFB
Timer RG Mode Register (TRGMR)
—
b7
0
PWM mode select bit
Phase counting mode select bit
Digital filer function select bit for
TRGIOA pin
TRGIOB pin
Digital filter function clock select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Digital filer function select bit for
b6
—
1
Oct 30, 2009
Bit Name
DFCK1
b5
0
DFCK0
b4
0
0: Timer Mode
1: PWM mode
0: Increment
1: Phase counting mode
0: Digital filter function not used
1: Digital filter function used
0: Digital filter function not used
1: Digital filter function used
b5 b4
0: Count stops
1: Count starts
0 0: f32
0 1: f8
1 0: f1
1 1: Clock selected by bits TCK0 to TCK2 in
DFB
b3
0
TRGCR register
DFA
b2
0
Function
MDF
b1
0
PWM
b0
0
22. Timer RG
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—