R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 157

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 120 of 802
8.7
Table 8.2
8.7.1
Table 8.3
Oscillation stop detection clock and frequency bandwidth
Condition for enabling the oscillation stop detection function
Operation at oscillation stop detection
Oscillation stop detection
(when (a) or (b))
Watchdog timer
The oscillation stop detection function detects the stop of the XIN clock oscillating circuit.
The oscillation stop detection function can be enabled and disabled by the OCD0 bit in the OCD register.
Table 8.2 lists the Specifications of Oscillation Stop Detection Function.
When the XIN clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b, the MCU is placed in the
following states if the XIN clock stops.
Generated Interrupt Source
•
•
•
•
•
•
•
•
•
•
OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)
OCD3 bit in OCD register = 1 (XIN clock stops)
CM14 bit in CM1 register = 0 (low-speed on-chip oscillator on)
Oscillation stop detection interrupt request is generated
The oscillation stop detection interrupt shares a vector with the watchdog timer interrupt. To use the
oscillation stop detection interrupt and watchdog timer interrupt, the interrupt source needs to be determined.
Table 8.3 lists the Determination of Interrupt Sources for Oscillation Stop Detection or Watchdog Timer.
Figure 8.6 shows an Example of Determining Interrupt Sources for Oscillation Stop Detection or Watchdog
Timer.
When the XIN clock restarts after oscillation stop, switch the XIN clock to the clock source for the CPU clock
and the peripheral functions by a program.
Figure 8.5 shows the Procedure for Switching Low-Speed On-Chip Oscillator to XIN Clock.
To enter wait mode while the oscillation stop detection function is used, set bits CM02 to CM1 to 00
(peripheral function clock does not stop in wait mode).
Since the oscillation stop detection function is a function for cases where the XIN clock is stopped by an
external cause, set bits OCD1 to OCD0 to 00b to stop or start the XIN clock by a program (select stop mode or
change the CM05 bit).
This function cannot be used when the XIN clock frequency is below 2 MHz. In this case, set bits OCD1 to
OCD0 to 00b.
To use the low-speed on-chip oscillator clock as the clock source for the CPU clock and the peripheral
functions after detecting the oscillation stop, set bits OCD1 to OCD0 to 11b.
Oscillation Stop Detection Function
How to Use Oscillation Stop Detection Function
Determination of Interrupt Sources for Oscillation Stop Detection or Watchdog Timer
Specifications of Oscillation Stop Detection Function
Item
Oct 30, 2009
(a) OCD3 bit in OCD register = 1
(b) Bits OCD1 to OCD0 in OCD register = 11b and OCD2 bit = 1
VW2C3 bit in VW2C register = 1
Bit Indicating Interrupt Source
f(XIN)
Bits OCD1 to OCD0 are set to 11b.
Oscillation stop detection interrupt generation
2 MHz
Specification
8. Clock Generation Circuit