R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 470

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 433 of 802
21.2.6
Note:
Table 21.3
Periodic interrupt triggered
every week
Periodic interrupt triggered
every day
Periodic interrupt triggered
every hour
Periodic interrupt triggered
every minute
Periodic interrupt triggered
every second
Periodic interrupt triggered
every 0.5 seconds
Periodic interrupt triggered
every 0.25 seconds
1. Do not set multiple enable bits to 1 (interrupt enabled).
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 011Dh
Symbol
SEIE025 Periodic interrupt triggered every
Symbol
SEIE05 Periodic interrupt triggered every
COMIE Compare match interrupt
Bit
WKIE
MNIE
SEIE
HRIE
DYIE
Timer RE Control Register 2 (TRECR2) in Real-Time Clock Mode
Source
COMIE
Interrupt Sources
b7
X
0.25 seconds enable bit
0.5 seconds enable bit
Periodic interrupt triggered every
second enable bit
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
hour enable bit
Periodic interrupt triggered every
day enable bit
Periodic interrupt triggered every
week enable bit
enable bit
WKIE
b6
X
Oct 30, 2009
Bit Name
The value of the TREWK register is set to 000b
(Sunday) (1-week period).
The TREWK register is updated (1-day period).
The TREHR register is updated (1-hour period).
The TREMIN register is updated (1-minute period).
The TRESEC register is updated (1-second period).
The 8-bit counter is updated (0.5-second period).
The 8-bit counter is updated (0.25-second period).
(1)
(1)
(1)
(1)
(1)
DYIE
b5
X
(1)
(1)
HRIE
b4
X
Interrupt Source
0: Periodic interrupt triggered every 0.25 seconds is
1: Periodic interrupt triggered every 0.25 seconds is
0: Periodic interrupt triggered every 0.5 seconds is
1: Periodic interrupt triggered every 0.5 seconds is
0: Periodic interrupt triggered every second is disabled
1: Periodic interrupt triggered every second is enabled
0: Periodic interrupt triggered every minute is disabled
1: Periodic interrupt triggered every minute is enabled
0: Periodic interrupt triggered every hour is disabled
1: Periodic interrupt triggered every hour is enabled
0: Periodic interrupt triggered every day is disabled
1: Periodic interrupt triggered every day is enabled
0: Periodic interrupt triggered every week is disabled
1: Periodic interrupt triggered every week is enabled
Set to 0 in real-time clock mode.
disabled
enabled
disabled
enabled
MNIE
b3
X
SEIE
b2
X
Function
SEIE05
b1
X
SEIE025
b0
X
Interrupt Enable Bit
SEIE025
SEIE05
WKIE
MNIE
DYIE
HRIE
SEIE
21. Timer RE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W