R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 244

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 207 of 802
Table 15.5
External input
Key input
A/D
UART0
UART1
UART2
SSU/I
Timer RC
Timer RD0
Timer RD1
Timer RE
Timer RG
Timer RA
Timer RB
Flash memory
Interrupt Request Source
When the DTC is activated, one control data is selected according to the data read from the vector table which
has been assigned to each activation source, and the selected control data is read from the DTC control data
area.
Table 15.5 shows the DTC Activation Sources and DTC Vector Addresses. A one-byte vector table area is
assigned to each activation source and one value from 00000000b to 00010111b (control data numbers in Table
15.4) is stored in each area to select one of the 24 control data sets.
Figures 15.3 to 15.7 show the DTC Internal Operation Flowchart.
2
C bus
DTC Activation Sources and DTC Vector Addresses
Timer RA
Timer RB
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Key input
A/D conversion
UART0 reception
UART0 transmission
UART1 reception
UART1 transmission
UART2 reception
UART2 transmission
Receive data full
Transmit data empty
Input-capture/compare-match A
Input-capture/compare-match B
Input-capture/compare-match C
Input-capture/compare-match D
Input-capture/compare-match A
Input-capture/compare-match B
Input-capture/compare-match C
Input-capture/compare-match D
Input-capture/compare-match A
Input-capture/compare-match B
Input-capture/compare-match C
Input-capture/compare-match D
Timer RE
Input-capture/compare-match A
Input-capture/compare-match B
Flash memory ready status
Oct 30, 2009
Interrupt Name
Source No.
10
12
13
14
15
16
17
22
23
24
25
26
27
28
29
30
31
32
33
42
47
48
49
51
52
11
0
1
2
3
4
5
6
7
8
9
DTC Vector Address
2C0Ch
2C0Dh
2C1Ch
2C1Dh
2C00h
2C01h
2C02h
2C03h
2C04h
2C05h
2C06h
2C07h
2C08h
2C09h
2C0Ah
2C0Bh
2C0Eh
2C0Fh
2C10h
2C16h
2C17h
2C18h
2C19h
2C1Ah
2C1Bh
2C1Eh
2C1Fh
2C20h
2C21h
2C2Ah
2C2Fh
2C30h
2C31h
2C33h
2C34h
2C11h
Priority
High
Low
15. DTC