R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 602

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 565 of 802
Figure 26.6
Note:
1. Write 0 after reading 1 to set the TEND bit to 0.
(1)
(2)
(3)
Write transmit data to the SSTDR register
SSSR register
SSER register
Sample Flowchart of Data Transmission (Clock Synchronous Communication Mode)
Read the TDRE bit in the SSSR register
Read the TEND bit in the SSSR register
transmission
Initialization
TDRE = 1?
TEND = 1?
continues?
Oct 30, 2009
Start
Data
End
TEND bit
TE bit
Yes
No
Yes
0
0
No
Yes
(1)
No
26. Synchronous Serial Communication Unit (SSU)
(2) Determine whether data transmission continues.
(3) When data transmission is completed, the TEND
(1) After reading the SSSR register and confirming
that the TDRE bit is set to 1, write the transmit
data to the SSTDR register. When the transmit
data is written to the SSTDR register, the TDRE
bit is automatically set to 0.
bit is set to 1. Set the TEND bit to 0 and the TE bit
to 0 and end transmit mode.