R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 364

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 327 of 802
20.3.14 Timer RD General Registers Ai, Bi, Ci, and Di (TRDGRAi, TRDGRBi,
Table 20.6
i = 0 or 1, j = either A, B, C, or D
BFCi, BFDi: Bits in TRDMR register
b15 to b0 Refer to Table 20.6 TRDGRji Register Functions for Input Capture Function
TRDGRAi
TRDGRBi
TRDGRCi
TRDGRDi
TRDGRCi
TRDGRDi
After Reset
After Reset
Register
Bit
Address 0149h to 0148h (TRDGRA0), 014Bh to 014Ah (TRDGRB0),
Access registers TRDGRAi to TRDGRDi in 16-bit units. Do not access them in 8-bit units.
The following registers are disabled for the input capture function:
TRDOER1, TRDOER2, TRDOCR, TRDPOCR0, and TRDPOCR1.
The pulse width of the input capture signal input to the TRDIOji pin should be set to three or more cycles of the
timer RD operating clock (refer to Table 20.1 Timer RD Operating Clocks) when the digital filter is not used
(the DFj bit in the TRDDFi register is set to 0).
Symbol
Symbol
Bit
Bit
TRDGRCi, TRDGRDi) (i = 0 or 1) for Input Capture Function
014Dh to 014Ch (TRDGRC0), 014Fh to 014Eh (TRDGRD0),
0159h to 0158h (TRDGRA1), 015Bh to 015Ah (TRDGRB1),
015Dh to 015Ch (TRDGRC1), 015Fh to 015Eh (TRDGRD1)
BFCi = 0
BFDi = 0
BFCi = 1
BFDi = 1
TRDGRji Register Functions for Input Capture Function
b15
Setting
b7
—
—
1
1
b14
b6
—
—
General register
The value of the TRDi register can be read at input
capture.
General register
The value of the TRDi register can be read at input
capture.
Buffer register
The value of the TRDi register can be read at input
capture. (Refer to 20.2.2 Buffer Operation )
1
1
Oct 30, 2009
b13
b5
—
—
1
1
Register Function
b12
b4
—
—
1
1
Function
b11
b3
—
—
1
1
b10
b2
—
—
1
1
b1
b9
—
—
1
1
TRDIOAi
TRDIOBi
TRDIOCi
TRDIODi
TRDIOAi
TRDIOBi
Input-Capture Input Pin
b0
b8
—
—
1
1
20. Timer RD
R/W
R/W