R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 624

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 587 of 802
27.2.9
Notes:
1. An overrun error interrupt request is generated when the clock synchronous format is used.
2. Set the STIE bit to 1 (stop condition detection interrupt request enabled) when the STOP bit in the ICSR register
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 019Bh
is set to 0.
Symbol
ACKBR Receive acknowledge bit
Symbol
ACKBT Transmit acknowledge
NAKIE
Bit
ACKE
STIE
TEIE
RIE
IIC bus Interrupt Enable Register (ICIER)
TIE
TIE
b7
0
select bit
Acknowledge bit detection
select bit
Stop condition detection
interrupt enable bit
NACK receive interrupt
enable bit
Receive interrupt enable bit
Transmit end interrupt
enable bit
Transmit interrupt enable bit
TEIE
b6
0
Bit Name
Oct 30, 2009
RIE
b5
0
NAKIE
b4
0: In transmit mode, the acknowledge bit received from
0
0: In receive mode, 0 is transmitted as the acknowledge bit.
1: In receive mode, 1 is transmitted as the acknowledge bit.
1: In transmit mode, the acknowledge bit received from
0: Content of the receive acknowledge bit is ignored and
1: When the receive acknowledge bit is set to 1,
0: Stop condition detection interrupt request disabled
1: Stop condition detection interrupt request enabled
0: NACK receive interrupt request and arbitration lost/
1: NACK receive interrupt request and arbitration lost/
0: Receive data full and overrun error interrupt request
1: Receive data full and overrun error interrupt request
0: Transmit end interrupt request disabled
1: Transmit end interrupt request enabled
0: Transmit data empty interrupt request disabled
1: Transmit data empty interrupt request enabled
the receive device is set to 0.
the receive device is set to 1.
continuous transfer is performed.
continuous transfer is halted.
overrun error interrupt request disabled
overrun error interrupt request
disabled
enabled
STIE
b3
0
(1)
ACKE
b2
0
Function
ACKBR
b1
0
(1)
ACKBT
b0
0
27. I
2
C bus Interface
(2)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R