R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 746

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 709 of 802
33.4.11 Software Commands
Table 33.5
WA:
WD
WD
BA:
BT:
×:
xx:
Read array
Clear status register
Program
Block erase
Lock bit program
Read lock bit status
Block blank check
33.4.11.1 Read Array Command
33.4.11.2 Clear Status Register Command
8
16
: Write data (8-bit)
The software commands are described below. Read or write commands and data in 8-bit units. However, write
the command and data of the program (word units) in 16-bit units.
The read array command is used to read the flash memory.
When FFh is written in the first bus cycle, the MCU enters read array mode. When the read address is input in
the following bus cycles, the content of the specified address can be read in 8-bit units.
Since read array mode remains until another command is written, the contents of multiple addresses can be read
continuously.
In addition, after a reset, the MCU enters read array mode after programming or block erasure or after entering
erase-suspend.
The clear status register command is used to set bits FST4 and FST5 in the FST register to 0.
When 50h is written in the first bus cycle, bits FST4 and FST5 in the FST register are set to 0.
: Write data (16-bit)
Command
Write address (specify the even address to program in word units.)
Any block address
Starting block address
Upper eight bits of command code (these bits are ignored)
Any address in the user ROM area
Software Commands
Oct 30, 2009
Mode
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Address
WA
BT
×
×
×
×
×
Data
FFh
50h
40h
20h
77h
71h
25h
Mode
Write
Write
Write
Write
Write
Second Bus Cycle
Address
WA
BA
BT
BT
BA
33. Flash Memory
Data
D0h
D0h
D0h
D0h
WD

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