R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 864

MCU FLASH 96+4KB 100LQFP

R5F2L3AAANFP#U1

Manufacturer Part Number
R5F2L3AAANFP#U1
Description
MCU FLASH 96+4KB 100LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet

Specifications of R5F2L3AAANFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F2L3AAANFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
RENESAS TECHNICAL UPDATE TN-R8C-A004B/E
3.
4.
5.
Note on the FMSTP bit
Do not set the FMR27 bit to 1 while the FMSTP bit is 1 (flash memory stops). Also, do not set the FMR27 bit to 1 when the
flash memory status is busy (the FST7 bit is 0) immediately after changing the FMSTP bit from 1 to 0 (flash memory
operates).
Note on CPU rewrite mode
Do not execute the program command, block erase command, or lock bit program command while the FMR27 bit is 1.
Note on the A/D converter
Do not perform A/D conversion while the FMR27 bit is 1. Also, do not set the FMR27 bit to 1 while the ADST bit is 1
(during A/D conversion).
Program example to enter wait mode
FMSTP bit
FST7 bit
<When executing the WAIT instruction>
BCLR
BCLR
FSET
WAIT
NOP
NOP
NOP
NOP
<When setting the CM30 bit to 1>
BCLR
BCLR
BSET
FCLR
BSET
NOP
NOP
NOP
NOP
BCLR
FSET
Do not set to low-consumption-current read mode.
I
I
0,PRCR
I
0,CM3
1,FMR0
7,FMR2
1,FMR0
7,FMR2
0,PRCR
(Make sure the FMR27 bit is 0.)
0 (busy)
; CPU rewrite mode disabled
; Low-consumption-current read mode disabled
; Enable interrupt
; Wait mode
; CPU rewrite mode disabled
; Low-consumption-current read mode disabled
; Writing to the CM3 register enabled
; Disable interrupt
; Wait mode
; Writing to the CM3 register disabled
; Enable interrupt
Low-consumption-current
read mode enabled
1 (ready)
Date: Dec. 08, 2009
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